;here is some improvements:
; remove EI opcode
; move sine generation
; i have no idea to add anything, 217bytes enough
;
	device zxspectrum128
    org #8000
begin
 ei
; out (#fe),a
  LD    A,7*8
 LD    (23695),A

;       LD    BC,(128+38+8+1)*256;B=Y,c=X(0) 175*256
       ld hl,0
lp0:
  ld a,l:add a,a
  ld c,a;i*2=x
  add a,a;i*4
  ld h,a;h=i*2
  ld b,0;175-64*2
  ld a,c:add a,32*2:ld c,a
       push hl
       CALL  8933;plot
       pop hl
 ;ld a,h:add a,a:ld h,a
 ld de,#0101
 ld a,#80:sub h
 jr nc,nosign
 neg
 ld e,#ff
nosign:
 ld c,a
 ld b,175;#40*2
 
 push hl
 CALL  9402;draw
 pop hl
       inc l:bit 6,l:jr z,lp0
;stub:jr stub
 ld hl,#4000
 ld de,#c000
lp1:push de,hl
 ld c,32;;;ld bc,32
 ldir
 pop hl:call nbhl
 pop de:inc d
 jr nz,lp1
;-----------------------sine precalc
 ld hl,0
 ld d,h,e,l;ld de,0;????
 ld bc,#7f00
genlp:
  add hl,de
  ld a,h
; Reflect the value around for a sine wave
  ld (bc),a
  push bc
  ;ld a,#7f:sub c:ld c,a
  ld a,b:sub c:ld c,a

  ;ld a,64*2:sub h
  ld a,b:sub h

  ld (bc),a
  pop bc
;next iteration
 ld a,e
 add a,#8;10;8
 ld e,a
 jr nc,next
 inc d
 ;ld a,d:adc a,0:ld d,a
next:
 inc c
 bit 6,c:jr z,genlp
 ld d,b,e,#80,c,b;#7f
neglp: ld a,(bc)
 sra a
 ;sra a
  ld (bc),a
  ld (de),a
 inc e:dec c:jr nz,neglp
;-----prepare 32 ldi's----------
 ld hl,ldi32
 ld e,32
preplp:
 ld (hl),#ED:inc hl
 ld (hl),#A0:inc hl
 dec e:jr nz,preplp
 ld (hl),#C9
; jr $
;--------------------------------main loop---------------------
 ld ix,#02FF;;01FE
lp33:halt
lp3: ld de,#0080
 ld h,b;;#7f
 exx:ld de,#4000:exx
lp2:
 ld l,e:ld a,(hl)
 ld l,d:add a,(hl)
 exx

 ld l,0
 or a:rra
 add a,#C0
 ld h,a
 push de

 call ldi32
; dup 32
; ldi
;edup

 pop hl
 call nbhl
 ld a,h
 ld de,hl
 exx
 push af

 ld a,d:add a,ixh:ld d,a
 ld a,e:add a,ixl:ld e,a
 pop af:cp #58:jr nz,lp2
 ld hl,lp3+1
 inc (hl),(hl),(hl)

 inc hl
 inc (hl),(hl)
 inc iyl
 jr nz,noparam

 inc ixh
 inc ixl
noparam:
 jp lp33

nbhl    inc h:ld a,h:and 7:ret nz
        ld a,l:add a,#20:ld l,a:ret c
        ld a,h:sub 8:ld h,a:ret 
ldi32:
end
	display /d,end-begin
	display end

    SAVEBIN "fake.cod",begin,end-begin

;	savesna "!draw.sna",begin
;    EMPTYTRD "dmo.trd" ;create empty TRD image
;    SAVETRD "dmo.trd","fake.C",begin,end-begin
