------------------------------------------------------------------------
  ßßÛßß  ÛßßßÜ  ßßÛßß  ÜßßßÜ  ÜßßßÜ   ÜßÜ   Û           ÜÛ
    Û    ÛÜÜÜß    Û    ßÜÜÜ   Û      Û   Û  Û     ÜÜÜ  ß Û
    Û    Û   Û    Û    Ü   Û  Û   Ü  ÛßßßÛ  Û            Û
  ßßßßß  ß   ß  ßßßßß   ßßß    ßßß   ß   ß  ßßßßß      ßßßßß
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 Idealized Reduced Instruction Set Computer Assembly Language
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Registers:  16, r0 through r15.
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Flags: Carry (C), Eq/Diff (E/D), Gr/Less (G/L).
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Timing:  All instructions are 1 clock except for branch/call
instructions, which are 2 clocks if the branch is taken, otherwise
they are 1 clock.  RET is also 2 clocks.
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Table Syntax:       imm   = immediate value
                    (xxx) = memory value at xxx1
                    [xxx] = instruction at xxx1
                    IP    = pointer to next instruction
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     Instruction              Description         Action
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     m    rx,ry               Move                rx = ry
     mi   rx,imm              Move Imm.           rx = imm
     ld   rx,(ry)             Load                rx = (ry)
     ldi  rx,(imm)            Load Imm.           rx = (imm)
     st   rx,(ry)             Store               (ry) = rx
     sti  rx,(imm)            Store Imm.          (imm) = rx
     a    rx,ry               Add                 rx = rx + ry
     s    rx,ry               Subtract            rx = rx - ry
     ac   rx,ry               Add w/Carry         rx = rx + ry + Carry
     sc   rx,ry               Sub. w/Carry        rx = rx - ry - Carry
*    d    rx                  Decrement           rx = rx - 1
*    i    rx                  Increment           rx = rx + 1
*    neg  rx                  Negate              rx = -rx
     shl  rx,ry               Shift Left          rx = rx * 2^ry
     shr  rx,ry               Shift Right         rx = rx / 2^ry
*    and  rx,ry               Bitwise AND         rx = rx AND ry
*    or   rx,ry               Bitwise OR          rx = rx OR ry
*    xor  rx,ry               Bitwise XOR         rx = rx XOR ry
*    not  rx                  Bitwise NOT         rx = NOT rx
     c    rx,ry               Compare             set flags E/D, G/L
     ci   rx,imm              Compare Imm.        set flags E/D, G/L
     psh  rx                  Push                push rx on stack
     pop  rx                  Pop                 pop stack into rx
     b    [imm]               Branch              goto [imm]
     bi   [rx]                Branch Indirect     goto [rx]
     be   [imm]               Branch if E         goto [imm] if E
*    bd   [imm]               Branch if D         goto [imm] if D
     bg   [imm]               Branch if G         goto [imm] if G and D
     bl   [imm]               Branch if L         goto [imm] if L and D
     cal  [imm]               Call                push IP, goto [imm]
     cai  [rx]                Call Indirect       push IP, goto [rx]
     ret                      Return              pop IP
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Memory, code and stack spaces are considered separate.
* These instructions not in original IRISCAL language.
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