PIC.TXT - 1.0

An allmost-all in one reference for the 8259 PIC found on most PCs.

Copyright 1994 Coridon Henshaw.  All rights reserved.
May be distributed and used for nonprofit perposes only.

Coridon Henshaw @ 1:250/820 (Fidonet) or
Coridon.Henshaw@f820.n250.z1.fidonet.org (Internet)


Reference: 'The Undocumented PC' by Frank Van Gilluwe

All ports are one byte wide.

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
20h   Input         8259-1 Read Interrupt Request/Service registers  All

General read data port for 20h commands 0Ah and 0Bh.  See discription for
the above commands (below) for more details.

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
20h   Output         8259-1 Command Register          All

This port provides general control for the first 8259 PIC.  A command
listing is provided below.  This port is most commonly used for sending the
EOI signal at the end of an interrupt.

There are more commands on the PIC, but I have only listed the commands that
actually do something, and are supported on PCs.

 Command    Name
 --------------------------------------------------------------------------
 2^4            Initialization mode

 '2^4' isn't exactly a command, but it is a required bit that must be set
 to enter initalisation mode.

 Command byte bitmap:

 Bit        Name
 ---------------------------------
 7        Unused
 6        Unused
 5        Unused
 4        Initialization mode.
 3        Clear: Edge triggered IRQ (PC,XT,AT)
          Set: Level triggered IRQ (MCA)
          Unused on EISA (Controlled from port 4D0h)
 2        Unused
 1        Clear: Cascade mode (AT+)
          Set: Single mode (PC/XT)
 0        Require 4th initalisation byte.  MUST be set to one.

 Command    Name
 --------------------------------------------------------------------------
 0Ah            Read Interrupt Request Register

 Loads the interrupt request register into port 20h.

 This command can be useful to see if any lower-priority hardware
 interrupts are pending while a high-priority interrupt handler is
 executing.

 Result byte bitmap:

 Bit        Name
 ---------------------------------
 7        IRQ 7 requests service
 6        IRQ 6 requests service
 5        IRQ 5 requests service
 4        IRQ 4 requests service
 3        IRQ 3 requests service
 2        IRQ 2 requests service
 1        IRQ 1 requests service
 0        IRQ 0 requests service

 Command    Name
 --------------------------------------------------------------------------
 0Bh            Read Interrupt In-Service Register

 Loads the interrupt in-service register into port 20h

 This command is generally used to distingish exception- and CPU-generated
 interrupts when in V86 mode.

 In-service bits for hardware interrupts are cleared by sending an EOI to
 the PIC.

 Result byte bitmap:

 Bit        Name
 ---------------------------------
 7        IRQ 7 in-service
 6        IRQ 6 in-service
 5        IRQ 5 in-service
 4        IRQ 4 in-service
 3        IRQ 3 in-service
 2        IRQ 2 in-service
 1        IRQ 1 in-service
 0        IRQ 0 in-service

 Command    Name
 --------------------------------------------------------------------------
 20h            End of interrupt (EOI)

 Tells the PIC that the end of an interrupt hander has been reached and to
 alow all IRQs to trigger interrupts.  Lower-priority IRQs are normally
 locked out when a high-priority interrupt handler is executing.

 Command    Name
 --------------------------------------------------------------------------
 48h            Clear special mask mode

 Resets the PIC from special mask mode.  See command 68h.

 Command    Name
 --------------------------------------------------------------------------
 6xh            Specific EOI

 Like command 20h, except clears in-service bits for a specific interrupt.
 Commands 60h-67h refer to IRQs 0-7, respectivly.

 No practial use as far as I can see.

 Command    Name
 --------------------------------------------------------------------------
 A0h            Rotating priority EOI

 Rotates the priority of IRQs opon interrupt compleation.  For example:
 IRQ 0 handler sends EOI to PIC, which then makes IRQ 0 the lowest priority
 and moves the last-executed IRQ to the highest priority.

 For this command to work corectly, ALL IRQ handlers must terminate using
 this command instead of 20h or 60-67h.

 No practical use unless you want to rewrite all hardware IRQ handlers.

 Command    Name
 --------------------------------------------------------------------------
    C0-C7h     Select IRQ priority

    Modifys the priority order of incoming IRQs.

               Priority
    Command    Highest        Lowest
    ----------------------------------
 C0h            0 7 6 5 4 3 2 1
 C1h            1 0 7 6 5 4 3 2
 C2h            2 1 0 7 6 5 4 3
 C3h            3 2 1 0 7 6 5 4
 C4h            4 3 2 1 0 7 6 5
 C5h            5 4 3 2 1 0 7 6
 C6h            6 5 4 3 2 1 0 7
 C7h            7 6 5 4 3 2 1 0

 C7h is the default in PCs.

 This command may be usful for high-speed serial I/O.

 Command    Name
 --------------------------------------------------------------------------
 68h            Set special mask mode

 This command can be used by a high-priority interrupt handler to alow
 lower priority interrupts to be serviced while it is running.        When
 enabled, all interrupts that are enabled in the interrupt enable register
 will be serviced, regardless of priority.

 Command    Name
 --------------------------------------------------------------------------
    E0-E7h     EOI and select lowest priority.

    Duplicate of command Cxh.  The only difference is that this command also
    sends an EOI.  It is intended for use in environments where all IRQs are
    equally important.

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
21h   Input         8259-1 Interrupt Enable Register     All

Reads which interrupts are enabled.

Result byte bitmap:

Bit    Name
---------------------------------
7      IRQ 7 disabled
6      IRQ 6 disabled
5      IRQ 5 disabled
4      IRQ 4 disabled
3      IRQ 3 disabled
2      IRQ 2 disabled
1      IRQ 1 disabled
0      IRQ 0 disabled

As you can see, if a bit is SET, the IRQ is disabled.

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
21h   Output         8259-1 Interrupt Enable & Initialization register All

Normal operating mode:

Command byte bitmap:

Bit    Name
---------------------------------
7      IRQ 7 disabled
6      IRQ 6 disabled
5      IRQ 5 disabled
4      IRQ 4 disabled
3      IRQ 3 disabled
2      IRQ 2 disabled
1      IRQ 1 disabled
0      IRQ 0 disabled

Initialization mode:

Command byte 1: This command is sent to port 20h.  See port 20h, command 2^4
Command byte 2:

Command byte bitmap:

Bit    Name
---------------------------------
7      3
6      3
5      3 Select base interrupt for IRQs.  Default 1 (IRQ 0 = 8)
4      3
3      3
2      Unused
1      Unused
0      Unused

Command byte 3:

Command byte bitmap:

Bit    Name
---------------------------------
7      Slave attached to IRQ 7
6      Slave attached to IRQ 6
5      Slave attached to IRQ 5
4      Slave attached to IRQ 4
3      Slave attached to IRQ 3
2      Slave attached to IRQ 2 (AT+)
1      Slave attached to IRQ 1
0      Slave attached to IRQ 0

Bit 2 MUST be the only bit set on an AT+.  On an XT, this byte MUST be 0.

Command byte 4:

Command byte bitmap:

Bit    Name
---------------------------------
7      Unused
6      Unused
5      Unused
4      Unknown
3      3Buffered mode
2      3 00 = non-buffered (AT).  10 = buffered mode (PC/XT)
1      Not supported on PC.  Set to 0
0      Must be set to 1

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
70h   Output         CMOS/NMI                 AT+

Interrupt related.  See a CMOS/RTC reference for data.

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
A0h   I/O         PIC 2 Register                AT+

Usage identical to port 20h.  All references to IRQs 0-7 in the discription
refer to IRQs 8-15.

Port  Direction         Name                   Platform
------------------------------------------------------------------------------
A1h   I/O         PIC 2 Register                AT+

Usage identical to port 21h.  All references to IRQs 0-7 in the discription
refer to IRQs 8-15.

